NGNI: Ultra-Low Power Implantable Platform for Next Generation Neural Interfaces

Completed Project (2010-2014)

Research Team: Yan Liu, Song Luan, Sivylla Paraskevopoulou, Deren Barsakcioglu, Amir Eftekhar, Timothy Constandinou
Collaborators: Andrew Jackson (Newcastle), Rodrigo Quian Quiroga (Leicester) 
Funding: Engineering and Physical Sciences Research Council (EPSRC) EP/I000569/1

Next Generation Neural Interfaces Concept
Wireless, multi-channel neural recording interface with on-node spike sorting for real-time motor prosthetic control

For over half a century scientists have recorded the tiny electrical potentials generated by neurons in the brains of awake animals performing specific behaviours, using large racks of power-hungry equipment. These experiments have yielded profound insights into how sensory information is represented and transformed by the brain into the signals that control purposeful movements, as well as revealing how this complex system is affected by neurological injuries and disease. However, until recently the therapeutic avenues available to neurologists have been limited to gross interventions such as systemic drug applications and neurosurgical lesions.

In recent years, small electronic devices have been developed that deliver specific patterns of stimulation via small electrodes implanted in the nervous system. Devices such as Deep Brain Stimulators and Cochlear Implants have helped many thousands of patients worldwide. The next generation of neural implants will use similar electrodes to detect the activity of neurons, paving the way for new treatments for conditions that currently weigh a heavy clinical burden. For example, by using the activity of neurons in motor areas of the brain to control electrical stimulation of muscles, it is possible that voluntary movements could be restored to patients paralysed by spinal cord injuries. However, despite considerable advances in electrode technologies, our ability to interface digital microelectronics with the brain at the level of individual neurons is at present severely limited. Each electrode detects the signal from multiple cells in its vicinity, and the small, brief 'spike' events they generate can be hard to distinguish beneath the background noise.

To address this problem we assembled a cross-disciplinary team with expertise in three key areas: the computational algorithms required to detect and sort spike events, low power integrated electronics to perform real-time, reliable spike identification, and the techniques to record long-term activity from the brain using neural implants in order to evaluate real-world performance. The project successfully delivered a platform technology for converting the raw signal from electrodes into a stream of identified spike events suitable for subsequent processing by conventional digital microelectronics.

Publications

Publications

2022

  • Z. Zhang and T. G. Constandinou, “Selecting an effective amplitude threshold for neural spike detection,” in 2022 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC), 2022. doi: https://doi.org/10.1101/2022.01.25.477685 

2021

  • Z. Zhang and T. G. Constandinou, “Adaptive spike detection and hardware optimization towards autonomous, high-channel-count BMIs,” Journal of Neuroscience Methods, p. 109103, 2021. doi: https://doi.org/10.1016/j.jneumeth.2021.109103
  • Z. Zhang and T. G. Constandinou, “A robust and automated algorithm that uses single-channel spike sorting to label multi-channel neuropixels data,” in IEEE/EMBS Conference on Neural Engineering, 2021. doi: https://doi.org/10.1109/NER49283.2021.9441234

2020

  • P. D. Schiavone, D. Rossi, Y. Liu, S. Benatti, S. Luan, I. Williams, L. Benini, and T. G. Constandinou, “Neuro-PULP: A paradigm shift towards fully programmable platforms for neural interfaces,” in IEEE Artificial Intelligence Circuits and Systems (AICAS), pp. 50–54, 2020. doi: https://doi.org/10.1109/AICAS48895.2020.9073920 

2018

  • S. Luan, I. Williams, M. Maslik, Y. Liu, F. De Carvalho, A. Jackson, R. Quian Quiroga, and T. G. Constandinou, “Compact standalone platform for neural recording with real-time spike sorting and data logging,” Journal of Neural Engineering, vol. 15, no. 4, pp. 1–13, 2018. doi: https://doi.org/10.1088/1741-2552/aabc23 

2017

  • S. Davila-Montero, D. Barsakcioglu, A. Jackson, T. G. Constandinou, and A. J. Mason, “Real-time clustering algorithm that adapts to dynamic changes in neural recordings,” in IEEE International Symposium on Circuits and Systems (ISCAS), pp. 690–693, 2017. doi: https://doi.org/10.1109/ISCAS.2017.8050425
  • S. Luan, I. Williams, F. De-Carvalho, L. Grand, A. Jackson, R. Quian Quiroga, and T. G. Constandinou, “Standalone headstage for neural recording with real-time spike sorting and data logging,” in BNA Festival of Neuroscience, 2017 

2016

  • D. Barsakcioglu and T. G. Constandinou, “A 32-channel MCU-based feature extraction and classification for scalable on-node spike sorting,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1310–1313, 2016. doi: https://doi.org/10.1109/ISCAS.2016.7527489
  • Z. Frehlick, I. Williams, and T. G. Constandinou, “Improving neural spike sorting performance using template enhancement,” in IEEE Biomedical Circuits and Systems (BioCAS) Conference, pp. 524–527, 2016. doi: https://doi.org/10.1109/BioCAS.2016.7833847
  • S. Luan, I. Williams, F. de Carvalho, A. Jackson, R. Quian Quiroga, and T. G. Constandinou, “Next generation neural interfaces for low-power multichannel spike sorting,” in FENS Forum of Neuroscience, 2016 

2014

  • S. E. Paraskevopoulou, D. Wu, A. Eftekhar, and T. G. Constandinou, “Hierarchical adaptive means (HAM) clustering for hardware-efficient, unsupervised and real-time spike sorting,” Journal of Neuroscience Methods, vol. 234, pp. 145–156, 2014. doi: https://doi.org/10.1016/j.jneumeth.2014.07.004
  • J. Navajas, D. Barsakcioglu, A. Eftekhar, A. Jackson, T. G. Constandinou, and R. Quian Quiroga, “Minimum requirements for accurate and efficient real-time on-chip spike sorting,” Journal of Neuroscience Methods, vol. 230, pp. 51–64, 2014. doi: https://doi.org/10.1016/j.jneumeth.2014.04.018
  • D. Barsakcioglu, Y. Liu, P. Bhunjun, J. Navajas, A. Eftekhar, A. Jackson, R. Quian Quiroga, and T. G. Constandinou, “An analogue front-end model for developing neural spike sorting systems,” IEEE Transactions in Biomedical Circuits and Systems, vol. 8, no. 2, pp. 216–227, 2014. doi: https://doi.org/10.1109/TBCAS.2014.2313087
  • Y. Yang, S. Boling, A. Eftekhar, S. E. Paraskevopoulou, T. G. Constandinou, and A. J. Mason, “Computationally efficient feature denoising filter and selection of optimal features for noise insensi- tive spike sorting,” in Proc. IEEE Engineering in Medicine and Biology Society (EMBS), 2014. doi: https://doi.org/10.1109/EMBC.2014.6943824
  • A. Jackson, T. G. Constandinou, A. Eftekhar, R. Quian Quiroga, and J. Navajas, “System for a brain-computer interface,” patents: EP3100138, JP6617108B2, US10820816B2, CN106062669A, 2014 

2013

  • E. Koutsos, S. E. Paraskevopoulou, and T. G. Constandinou, “A 1.5μW NEO-based spike detector with adaptive-threshold for calibration-free multichannel neural interfaces,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2013. doi: https://doi.org/10.1109/ISCAS.2013.6572243
  • S. E. Paraskevopoulou, D. Y. Barsakcioglu, M. Saberi, A. Eftekhar, and T. G. Constandinou, “Feature extraction using first and second derivative extrema (FSDE), for real-time and hardware-efficient spike sorting,” Journal of Neuroscience Methods, vol. 215, pp. 29–37, 2013. doi: https://doi.org/10.1016/j.jneumeth.2013.01.012
  • D. Y. Barsakcioglu, A. Eftekhar, and T. G. Constandinou, “Design optimisation of front-end neural interfaces for spike sorting systems,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2013. doi: https://doi.org/10.1109/ISCAS.2013.6572387

2012

  • B. Haaheim and T. G. Constandinou, “A sub 1μW, 16 kHz current-mode SAR-ADC for neural spike recording,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2012. doi: https://doi.org/10.1109/ISCAS.2012.6271937
  • S. E. Paraskevopoulou and T. G. Constandinou, “An ultra-low-power front-end neural interface with automatic gain for uncalibrated monitoring,” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2012. doi: https://doi.org/10.1109/ISCAS.2012.6271651

2011

  • S. E. Paraskevopoulou and T. G. Constandinou, “A sub-1μW neural spike-peak detection and spike-count rate encoding circuit,” in Proc. IEEE Biomedical Circuits and Systems (BioCAS) Conference, pp. 29–32, 2011. doi: https://doi.org/10.1109/BioCAS.2011.6107719

2010

  • A. Eftekhar, S. E. Paraskevopoulou, and T. G. Constandinou, “Towards a next generation neural interfaces: Optimizing power, bandwidth and data quality,” in Proc. IEEE Biomedical Circuits and Systems (BioCAS) Conference, pp. 122–125, 2010. doi: https://doi.org/10.1109/BIOCAS.2010.5709586